1. Technical Field
The present invention relates to an alignment apparatus, a substrate stacking apparatus, a multilayered substrate manufacturing apparatus, an exposure apparatus and an alignment method.
2. Related Art
Japanese Patent Application Publication No. 2005-026278 discloses that a multilayered element may be manufactured by overlapping elements on one another. Japanese Patent Application Publication No. 2007-103225 discloses a technique to improve the productivity of the multilayered semiconductor device manufacturing process by layering wafers in each of which a plurality of chips are formed. To manufacture a multilayered semiconductor device by layering elements on one another, the elements are first aligned to each other on the order of submicrons and then attached to each other.
To align substrates or the like to each other on the order of submicrons, the positions of alignment marks formed on the substrates are detected with accuracy on the order of submicrons. The substrates are then moved and aligned in such a manner that the detected positions of the alignment marks match predetermined target positions.
When a high-accuracy position detecting apparatus is utilized, however, it takes an enormously long time to complete the alignment when the alignment marks are initially positioned far away from the target positions. Therefore, the throughput of the multilayered semiconductor device manufacturing process is lowered.